1. Field of the Invention
The present invention relates to a method of manufacturing a bipolar transistor and, more particularly, to a method of manufacturing an ultra-miniaturized bipolar transistor for an integrated circuit.
2. Description of the Prior Art
The method of manufacturing an ultra-miniaturized bipolar transistor as shown in FIGS. 1A to 1C, for example, is a known conventional method (S. Konaka et al., Extended Abstracts of the l6th Conf. on Solid State Devices and Materials, 1984, p. 209 to 212), and can be schematically described as follows:
Referring to FIG. 1A, insulating film 2 is formed on semiconductor substrate (in this case, n-type Si substrate) 1, and impurity-doped (in this case, p-type impurity) first polysilicon (or polycrystaline silicon) film 3 is deposited on the resultant structure. An opening is formed in a predetermined portion of first polysilicon film 3, after which insulating film 2 is etched, using first polysilicon film 3 as a mask, to expose part of a surface of semiconductor substrate 1. In this case, as is shown in FIG. 1A, insulating film 2 is laterally overetched to form undercut portion 4 under first polysilicon film 3. Thereafter, undoped second polysilicon film 5 is deposited on the resultant structure.
Subsequently, as is shown in FIG. 1B, second polysilicon film 5 is etched, with the result that only portions thereof which are buried under undercut portions 4 remain. The resultant structure is thermally oxidized to form oxide films 6.sub.1 and 6.sub.2 on first and second polysilicon films 3 and 5, and on the exposed surface of substrate 1, respectively. Upon thermal oxidation, a p-type impurity contained in first polysilicon film 3 is diffused into second polysilicon film 5 and also into substrate 1, to form p-type external base region 7. By using this method, the width of external base region 7 can be controlled with accuracy. Since the width of the external base region of an integrated circuit greatly influences the transistor characteristics, use of this method is thus particularly advantageous.
Next, as is shown in FIG. 1C, a p-type impurity is ion implanted into substrate 1 passing through the opening and penetrating oxide film 6.sub.2, to form internal base region 8. Then, undoped third polysilicon film 9 is deposited on the entire surface of the resultant structure and is etched back to a depth corresponding to the thickness of third polysilicon film 9. Thus, film 9 remains only on the side wall of the opening. In the state wherein the diameter of the opening is decreased in this manner, oxide film 6.sub.2 is removed to form an opening portion. Then, an n-type impurity is doped into substrate 1 through the opening portion, to form self-aligned emitter region 10 in internal base region 8. Generally, diffusion is carried out in the emitter region by using a polysilicon film doped with an n-type impurity as a diffusion source.
Thereafter, necessary terminal electrodes is formed by an ordinary process, thereby obtaining a bipolar transistor. In this case, first polysilicon film 3 can be used as a part of a base electrode.
The above conventional method, however, has the following drawbacks.
First, when second polysilicon film 5 is etched such that the only part thereof remaining is part buried in undercut portions 4 under first polysilicon film 3, control of the etching is difficult. Since second polysilicon film 5 left in this manner determines the width of external base region 7 which will be formed by the subsequent thermal oxidation, control of etching is very important.
Second, when oxide films 6.sub.1 and 6.sub.2 are formed, defects tend to occur in the crystal structure of the surface layer of substrate 1 due to the considerable pressure which is applied to the surface of substrate 1 when polysilicon film 5 expands in volume upon its oxidation. Crystal defects in this region lead to an increase in current leakage of a transistor. The reason why the stress is increased in oxidation process is that the exposed end face of second polysilicon film 5, which is buried in undercut portions 4, becomes steep. When this steep edge is oxidized, the stress caused by volume expansion cannot escape upward, but is directly applied onto substrate 1.
Third, in order to reduce the width of the emitter, a step is required for forming polysilicon film 9 on the side wall defining the opening of the first polysilicon film 3, thereby complicating the steps.